The present invention relates to a semiconductor device and a manufacturing method thereof, which are applicable to gate wirings and interconnect wirings of a MOS transistor.
For example, a gate electrode of a MOS transistor generally adopts a layer structure of a poly-silicon and a refractory metal silicide. To form this kind of gate electrode, at first, a gate oxide film is formed on a silicon substrate, and further, poly-silicon and refractory metal silicide are sequentially deposited on the gate oxide film. Thereafter, a resist is applied onto the refractory metal silicide and is subjected to patterning. With this resist pattern used as a mask, the poly-silicon and the refractory metal silicide are etched to form a gate electrode. Subsequently, these components are post-oxidized in an atmosphere of diluted oxygen at a high temperature, to recover damages caused by the etching.
Meanwhile, material of the gate electrode may be, for example, a titanium silicide/poly-silicon structure in which titanium silicide is layered on poly-silicon, a tungsten silicide/poly-silicon structure in which tungsten silicide is layered on poly-silicon, or the like. However, the following problems will occur in case where a gate electrode using such a layer structure is subjected to post-oxidation.
FIG. 5 shows a case of a layer structure consisting of poly-silicon and titanium silicide. A gate oxide film 51 is formed on the silicon substrate 50, and a poly-silicon layer 52 is formed on the gate oxide film 51. A titanium silicide layer (TiSix) 53 is formed on the poly-silicon layer 52 by sputtering. The titanium silicide layer 53 thus sputtered is made of amorphous, and is thereafter crystallized through high-temperature processing. This high-temperature processing is a step in which silicon nitride is deposited on titanium silicide by LP-CVD (Low Pressure Chemical Vapor Deposition) or side walls of a gate electrode are oxidized.
In case where this high-temperature processing is thus carried out, poly-silicon and titanium silicide are partially inverted or agglomeration occurs. When inversion occurs, titanium silicide 53 penetrates through poly-silicon 52 and has a contact with a gate oxide film 51, as shown in FIG. 6. In addition, when agglomeration occurs, grains of titanium silicide 53 are formed on poly-silicon 52. When inversion occurs as described above, characteristics of the gate oxide film are degraded. When agglomeration occurs, the sheet resistance of the gate electrode is extremely raised.
Meanwhile, FIG. 8 shows a structure in which a tungsten silicide layer 54 and a silicon nitride layer 55 are layered, in place of a titanium silicide layer, on the poly-silicon layer 52. In this case, problems like inversion or agglomeration described above do not occur. However, in case of the tungsten silicide, in a step of performing a high-temperature heat treatment to form an oxide film 56 on the side walls of poly-silicon 52 and tungsten silicide 54, abnormal oxidation occurs on the side walls of the tungsten silicide 54 and WO.sub.3 +SiO.sub.2 57 is formed, as shown in FIG. 8. This abnormal oxidation is considered to be caused by a native oxide film 58 remaining at the boundary between the poly-silicon and the tungsten silicide. This means that the remaining native oxide film 58 prevents silicon from moving from the poly-silicon 52 to the tungsten silicide 54, so that the amount of silicon supplied to the tungsten silicide 54 from the poly-silicon 52 is insufficient. It is therefore considered that the side surface portion of the tungsten silicide 54 is rich in tungsten, and WO.sub.3 +SiO.sub.2 grows in this portion. Specifically, a reaction represented by the following reaction formula occurs at the side wall of the tungsten silicide 54, thereby forming WO.sub.3. EQU WSix+O.sub.2 .fwdarw.WO.sub.3 +SiO.sub.2
Thus, a semiconductor device using the titanium polycide or tungsten polycide causes inversion or agglomeration or abnormal oxidization in a high-temperature heat treatment step, and therefore, is not satisfactory.